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LHF32KZM
DC Characteristics (Continued)
36
V CC =2.7V
V CC =3.3V
Test
Sym.
V IL
V IH
Parameter
Input Low Voltage
Input High Voltage
Notes
7
7
Min.
-0.5
2.0
Max.
0.8
V CC
+0.5
Min.
-0.5
2.0
Max.
0.8
V CC
+0.5
Unit
V
V
Conditions
V OL
V OH1
V OH2
Output Low Voltage
Output High Voltage
(TTL)
Output High Voltage
(CMOS)
3,7
3,7
3,7
2.4
0.85
V CC
0.4
2.4
0.85
V CC
0.4
V
V
V
V CC =V CC Min.
I OL =2mA
V CC =V CC Min.
I OH =-2.5mA
V CC =V CC Min.
I OH =-2.5mA
V CC
-0.4
V CC
-0.4
V
V CC =V CC Min.
I OH =-100μA
V PPLK V PP Lockout Voltage during
Normal Operations
4,7
1.5
1.5
V
V PPH1 V PP Voltage during Write or
Erase Operations
V PPH2 V PP Voltage during Write or
Erase Operations
V PPH3 V PP Voltage during Write or
Erase Operations
V LKO
V CC Lockout Voltage
2.7
3.0
4.5
2.0
3.6
3.6
5.5
?
3.0
4.5
2.0
?
3.6
5.5
V
V
V
V
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at nominal V CC voltage and T A =+25°C.
2. I CCWS and I CCES are specified with the device de-selected. If read or byte written while in erase suspend mode,
the device’s current draw is the sum of I CCWS or I CCES and I CCR or I CCW , respectively.
3. Includes STS.
4. Block erases, full chip erases, (multi) word/byte writes and block lock-bit configurations are inhibited when
V PP ≤ V PPLK , and not guaranteed in the range between V PPLK (max.) and V PPH1 (min.), between V PPH1 (max.) and
V PPH2 (min.), between V PPH2 (max.) and V PPH3 (min.) and above V PPH3 (max.).
5. Automatic Power Savings (APS) reduces typical I CCR to 3mA at 2.7V and 3.3V V CC in static operation.
6. CMOS inputs are either V CC ±0.2V or GND±0.2V. TTL inputs are either V IL or V IH .
7. Sampled, not 100% tested.
Rev. 1.6
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